Digital IC Design Engineer

Austin, Texas, United States; South San Francisco, California, United Statesvia Neuralink CareersPosted Jun 27, 2023
Match with my CV

Technical skills

PythonC++

Responsibilities

Our Digital IC Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces.

Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred.

  • Micro-architecture design and RTL implementation of:
  • Low-power digital signal processors
  • Low-power general-purpose hardware accelerators
  • Low-power graphics processing units
  • Low-power radio MAC/PHY
  • Low-power serial link MAC/PHY
  • Design and optimization of hardware/software interface with firmware engineers
  • Application-specific architecture optimization including:
  • Complex system modeling for energy and performance benchmarks
  • Workload analysis and modeling
  • Energy/performance profiling and analysis
  • Leveraging architecture-level design trade-offs with process technology and workload type
  • Balancing cost and performance under manufacturing process variation
  • Collaboration on silicon bring-up tests with verification engineers
  • Required

Qualifications

  • Bachelor of Science (B.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience
  • Evidence of exceptional ability in electrical engineering, computer science, or computer engineering
  • 5+ years of experience in digital design
  • Expertise in SystemVerilog, C/C++, Python
  • Experience working on complex digital systems from architecture, microarchitecture, and RTL, using industry standard tools
  • Experience in designing digital signal processing pipelines, from algorithm to RTL

Preferred Qualifications

  • Experience in architecture optimization with process technology customization
  • Experience in the verification of complex digital systems, using industry standard tools
  • Experience in the physical design of complex digital systems, using industry standard tools
  • Experience testing and debugging digital system-on-a-chips
  • Functional modeling experience and logic verification with SystemVerilog, SystemC/C++
  • Experience automating tool flows
  • Experience with embedded design
  • Experience in processor instruction set architecture design
  • Experience in compiler back-end design and customization
  • Expected Compensation:

The anticipated base salary for this position is expected to be within the following range. Your actual base pay will be determined by your job-related skills, experience, and relevant education or training. We also believe in aligning our employees’ success with the company's long-term growth. As such, in addition to base salary, Neuralink offers equity compensation (in the form of Restricted Stock Units (RSU)) for all full-time employees.

  • Base Salary Range:

$116,000—$233,800 Usd

What We Offer

  • Full-time employees are eligible for the following benefits listed below.
  • An opportunity to change the world and work with some of the smartest and most talented experts from different fields
  • Growth potential; we rapidly advance team members who have an outsized impact
  • Excellent medical, dental, and vision insurance through a PPO plan
  • Paid holidays

- Commuter benefits

  • Meals provided
  • Equity (RSUs) *Temporary Employees & Interns excluded
  • 401(k) plan *Interns initially excluded until they work 1,000 hours
  • Parental leave *Temporary Employees & Interns excluded
  • Flexible time off *Temporary Employees & Interns excluded

Before you apply

  • 1Which parts of your CV prove experience with Python and C++?
  • 2Which recent work examples would make your application stronger for this role?
  • 3What details from the original source listing should you confirm before applying?

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